Quick Start : Designing with AMD Versal™ Adaptive SoC (French Language) 9h - 17h CET
(ref.A_QSTART)

1 day - 7 hours   
Target objectives and skills
- During the event, you'll be introduced to the new AMD Versal™ platform. Explore the heterogeneous Versal™ adaptive SoC architecture containing programmable network-on-chip (NoC) and AI engines, and learn how to use different design tool flows targeting Versal devices.
Concerned public
- Technicians and Engineers in Digital Electronics
- All our training courses are given at a distance and are accessible to people with reduced mobility.
- People with disabilities may have special training needs. Our partner AGEFIPH accompanies us to implement the necessary adaptations related to your disability. Don't hesitate to to discuss your requirements.
Prerequisites
- Comfort with the C/C++ programming language
- Vitis™ IDE software development flow
- Hardware development flow with the Vivado™ Design Suite
- Basic knowledge of UltraScale™/UltraScale+™ FPGAs and Zynq™ UltraScale+ MPSoCs
Course content
Architecture Overview {Lecture}
Design Tool Flow {Lecture, Demo}
Embedded Software Development {Lecture, Demo}
NoC Introduction and Concepts {Lecture, Demo}
AI Engine {Lecture, Demo}
Teaching Methods
- Inter-company online training :
Recommended computer hardware
- Inter-company online training :
- Recent computer OS Linux or Windows 64-bits
- Fast Internet, webcam, headset
- Software tool WebEx Cisco
Teaching staff
- William Duluc, Electronics and Telecoms Engineer, AMD Expert since 2009 and AMD Trainer since 2017 :
- Expert AMD FPGA - Language VHDL/Verilog - RTL Design
- Expert AMD SoC & MPSoC - Language C/C++ - System Design
- Expert DSP & AMD RFSoC – HLS - Matlab - Design DSP RF
- Expert AMD Versal – AI Engines – Heteregenous System Architect
Certified Partner

Notes
- Release date: 15/11/2024