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MVD Training

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Up coming training sessions

Zynq UltraScale+™ MPSoC : Hardware and Software Design

November 26-27[register]

Vivado™ High Level Synthesis

December 09-10[register]

FORMATION EN LIGNE

Accelerating Applications with the Vitis Unified Environment Software

January 06-07[register]

SEVRES (92)

Zynq UltraScale+™ MPSoC : Hardware and Software Design

January 28-29[register]

EN LIGNE

Training sessions schedule

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Xilinx FPGA

Xilinx FPGA

Ultrascale, Vivado, 7-Serie,...

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Xilinx SoC & MPSoC

Xilinx SoC & MPSoC

Zynq, Zynq MPSoC, HLx, PetaLinux

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Vitis Xilinx

Vitis Xilinx

Vitis Unified Software Platform

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Connectivity

Connectivity

Transceivers, PCI-e, Ethernet

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DSP

RFSoC & DSP

Digital Signal Processing on RFSoC and FPGA

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HDL language

HDL language

Hardware Description Language

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