Zynq UltraScale+™ MPSoC : System Architecture, Hardware and Software Design
(ref.E_ZUPAHS)
4 days - 28 hours
Objectives
- After completing this training, you will have the skills to:
- 1 - Outline the high-level architecture of the devices
- 2 - Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities
- 3 - Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
- 4 - Identify mechanisms to secure and safely run the system
- 5 - Define boot sequences appropriate to the needs of the system
- 6 - Identify situations when a hypervisor should be used
- 7 - Distinguish between asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) environments
Prerequisites
- Understanding of the Zynq-7000 architecture
- Familiarity with embedded operating systems
Concerned public
- Technicians and Engineers in Digital Electronics
- All our training courses are given at a distance and are accessible to people with reduced mobility.
- Our partner AGEFIPH accompanies us to implement the necessary adaptations related to your disability.
Notes
- Release date: 20/12/2021
Chapters
Objective 1
- Zynq UltraScale+ MPSoC Overview {Lecture, Lab}
Objective 2
- Zynq UltraScale+ MPSoC Application Processing Unit {Lecture, Lab}
- Zynq UltraScale+ MPSoC Real-Time Processing Unit {Lecture, Lab}
- Zynq UltraScale+ MPSoC DDR and QoS {Lecture, Lab}
- Zynq UltraScale+ MPSoC System Coherency {Lecture}
- QEMU {Lecture, Lab}
Objective 3
- Zynq UltraScale+ MPSoC Power Management {Lecture, Lab}
- Zynq UltraScale+ MPSoC PMU {Lecture, Lab}
Objective 4
- Zynq UltraScale+ MPSoC Security and Software {Lecture}
- Zynq UltraScale+ MPSoC System Protection {Lecture}
- ARM TrustZone Technology {Lecture}
Objective 5
- Zynq UltraScale+ MPSoC Booting {Lecture, Lab}
Objective 6
- MultiProcessor Software Architecture {Lecture}
- Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture}
- Xen Hypervisor {Lecture} (pairs with OpenAMP, but not SMP)
Objective 7
- OpenAMP {Lecture} (pairs with the Xen Hypervisor, but not SMP)
- Linux {Lecture}
- Yocto {Lecture}
- Open Source Library (Linux) {Lecture, Lab}
- FreeRTOS {Lecture, Lab}
Teaching Methods
- Inter-company online training :
Methods of monitoring and assessment of results
- Attendance sheet
- Evaluation questionnaire
- Evaluation sheet on:
- Technical questionnaire
- Result of the Practical Works
- Validation of Objectives
- Presentation of a certificate with assessment of prior learning
Support
- Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
- Expert FPGA XILINX - Language VHDL/Verilog - RTL Design
- Expert SoC & MPSoC XILINX - Language C/C++ - System Design
- Expert DSP & RFSoC XILINX – HLS - Matlab - Design DSP RF
- Expert ACAP XILINX – AI Engines – Heteregenous System Architect
PC Recommended
- Software Configuration :
- Hardware configuration:
- Recent computer (i5 or i7)
- OS Linux 64-bits
- At least 16GB RAM
- Display resolution recommended 1920x1080