Zynq UltraScale+™ MPSoC : System Architecture, Hardware and Software Design

(ref.E_ZUPAHS)

4 days - 28 hours

Objectives

  • After completing this training, you will have the skills to:
    • Describe the high-level architecture of devices
    • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
    • Identify mechanisms to secure and safely run the system
    • Define boot sequences appropriate to the needs of the system
    • List the key components of the Application Processing Unit (APU) and the Real-Time Processing Unit (RPU)
    • Use QEMU to emulate hardware behavior
    • Distinguish between asymmetric multiprocessor environments (AMP) and symmetric multiprocessor environments (SMP)
    • Identify situations where ARM® TrustZone technology and/or a hypervisor should be used
    • Define the underlying implementation of the Application Processing Unit (APU) and Real-Time Processing Unit (RPU) to take full advantage of their capabilities

Prerequisites

  • Understanding of the Zynq-7000 architecture
  • Familiarity with embedded operating systems

Concerned public

  • Technicians and Engineers in Digital Electronics
  • All our training courses are given at a distance and are accessible to people with reduced mobility.
  • For other people, in order to find a training or a job adapted to your handicap, you can go on the site of the AGEFIPH https://www.agefiph.fr/

Notes

  • Release date: 20/12/2021

Chapters

Zynq UltraScale+ MPSoC Overview {Lecture, Lab}

Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture, Lab}

QEMU {Lecture, Lab}

Zynq UltraScale+ MPSoC Security and Software {Lecture}

Zynq UltraScale+ MPSoC Power Management {Lecture, Lab}

Zynq UltraScale+ MPSoC System Coherency {Lecture}

Zynq UltraScale+ MPSoC DDR and QoS {Lecture, Demo, Lab}

Zynq UltraScale+ MPSoC Booting {Lecture, Lab}

Zynq UltraScale+ MPSoC Ecosystem Support {Lecture}

Zynq UltraScale+ MPSoC Application Processing Unit {Lecture, Lab}

Zynq UltraScale+ MPSoC Real-Time Processing Unit {Lecture, Lab}

QEMU {Lecture, Lab}

Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture, Lab}

Zynq UltraScale+ MPSoC Booting {Lecture, Lab}

Zynq UltraScale+ MPSoC System Protection {Lecture}

Zynq UltraScale+ MPSoC Clocks and Resets {Lecture}

Zynq UltraScale+ MPSoC PMU {Lecture, Lab}

ARM TrustZone Technology {Lecture}

MultiProcessor Software Architecture {Lecture}

Xen Hypervisor {Lecture, Lab} (pairs with OpenAMP, but not SMP)

OpenAMP {Lecture, Lab} (pairs with the Xen Hypervisor, but not SMP)

Linux {Lecture}

Yocto {Lecture, Lab}

Open Source Library (Linux) {Lecture, Lab}

FreeRTOS {Lecture, Lab}

Zynq UltraScale+ MPSoC Software Stack {Lecture}

Teaching Methods

  • Inter-company training :
    • Online training
    • Presentation by Webex
    • Provision of course material in PDF format

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL/Verilog - RTL Design
    • Expert SoC & MPSoC XILINX - Language C/C++ - System Design
    • Expert DSP & RFSoC XILINX – HLS - Matlab - Design DSP RF
    • Expert ACAP XILINX – AI Engines – Heteregenous System Architect

PC Recommended

  • Software Configuration :
    • WebEx Cisco
    • RealVNC Viewer
    • Vitis unified software platform 2021.1
    • PetaLinux 2021.1
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • OS Linux 64-bits
    • At least 16GB RAM
    • Display resolution recommended 1920x1080

Partner

xilinx atp