Zynq UltraScale+™ MPSoC : System Architecture, Hardware and Software Design
(ref.E_ZUPAHS)

4 days - 28 hours   
Target objectives and skills
- 1 - Outline the high-level architecture of the devices
- 2 - Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities
- 3 - Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
- 4 - Identify mechanisms to secure and safely run the system
- 5 - Define boot sequences appropriate to the needs of the system
- 6 - Identify situations when a hypervisor should be used
- 7 - Distinguish between asymmetric multiprocessing (AMP) and symmetric multiprocessing (SMP) environments
Concerned public
- Technicians and Engineers in Digital Electronics
- All our training courses are given at a distance and are accessible to people with reduced mobility.
- People with disabilities may have special training needs. Our partner AGEFIPH accompanies us to implement the necessary adaptations related to your disability. Don't hesitate to to discuss your requirements.
Prerequisites
- Understanding of the Zynq™-7000 architecture
- Familiarity with embedded operating systems
Course content
Objective 1
- Zynq UltraScale+ MPSoC Overview {Lecture, Lab}
Objective 2
- Zynq UltraScale+ MPSoC Application Processing Unit {Lecture, Lab}
- Zynq UltraScale+ MPSoC Real-Time Processing Unit {Lecture, Lab}
- Zynq UltraScale+ MPSoC DDR and QoS {Lecture, Lab}
- Zynq UltraScale+ MPSoC System Coherency {Lecture}
- QEMU {Lecture, Lab}
Objective 3
- Zynq UltraScale+ MPSoC Power Management {Lecture, Lab}
- Zynq UltraScale+ MPSoC PMU {Lecture, Lab}
Objective 4
- Zynq UltraScale+ MPSoC Security and Software {Lecture}
- Zynq UltraScale+ MPSoC System Protection {Lecture}
- ARM TrustZone Technology {Lecture}
Objective 5
- Zynq UltraScale+ MPSoC Booting {Lecture, Lab}
Objective 6
- MultiProcessor Software Architecture {Lecture}
- Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture}
- Xen Hypervisor {Lecture} (pairs with OpenAMP, but not SMP)
Objective 7
- OpenAMP {Lecture} (pairs with the Xen Hypervisor, but not SMP)
- Linux {Lecture}
- Yocto {Lecture}
- Open Source Library (Linux) {Lecture, Lab}
- FreeRTOS {Lecture, Lab}
Teaching methods and support - Assessment and recognition
- Teaching methods :
- Alternating lectures, technical questionnaires and exercises on individual machines.
- Pedagogical follow-up :
- Signed attendance sheet
- Pedagogical assessment :
- Continuous assessment and progress sheet :
- Technical questionnaire
- Practical work results
- Validation of objectives
- Satisfaction survey :
- At the end of training: assessment form completed by the trainee
- At 3 months: evaluation form completed by the trainee after application to the company
- Certificate :
- Training certificate with assessment of learning provided to trainee
- Certificate of completion provided to employer
Teaching Methods
- Inter-company online training :
- Fast Internet connection, webcam, headset
- Presentation by Webex by Cisco
- Provision of course material in PDF format
- Labs on individual Cloud PC by RealVNC
- Intra-company face-to-face training on customer site : (details to be confirmed prior to training)
- Suggested supply by the customer :
- Training room
- Video projector
- Whiteboard
- Individual PC with AMD tools
- Provided by MVD Training :
- Course material in PDF format
- Practical work on individual PCs (loan of equipment available on request)
Recommended computer hardware
- Inter-company online training :
- Recent computer OS Linux or Windows 64-bits
- Fast Internet, webcam, headset
- Software tool WebEx Cisco
- AMD remote tools :
- Software tool RealVNC Viewer
- AMD local tools :
- Software tool AMD Vitis and PetaLinux 2022.2
- Face-to-face training on customer site :
- Recent computer OS Linux or Windows 64-bits
- Software tool AMD Vitis and PetaLinux 2022.2
Teaching staff
- William Duluc, Electronics and Telecoms Engineer, AMD Expert since 2009 and AMD Trainer since 2017 :
- Expert AMD FPGA - Language VHDL/Verilog - RTL Design
- Expert AMD SoC & MPSoC - Language C/C++ - System Design
- Expert DSP & AMD RFSoC – HLS - Matlab - Design DSP RF
- Expert AMD Versal – AI Engines – Heteregenous System Architect
Certified Partner

Notes
- Release date: 15/11/2024