Zynq™ : Embedded Systems Advanced Design

(ref.E_ZADV)

2 days - 14 hours

Objectives

  • After completing this comprehensive training, you will have the necessary skills to:
    • Assemble an advanced embedded system
    • Take advantage of the various features of the Zynq All Programmable SoC and Kintex® FPGAs, Cortex™-A9 and MicroBlaze processors, including the AXI interconnect, and the various memory controllers
    • Apply advanced debugging techniques, including the use of the Vivado logic analyzer tool for debugging an embedded system
    • Integrate an interrupt controller and interrupt handler into an embedded design
    • Analyze the operation and capabilities of the DMA controller in the Zynq All Programmable SoC
    • Implement an effective Zynq All Programmable SoC boot design methodology

Partners

xilinx atp

Prerequisites

  • FPGA design and Vivado™ Design Suite experience
  • The essentials of embedded design for Xilinx components training (E_ZAHS) or equivalent knowledge
  • Basic understanding of microprocesseur and FPGA architecture
  • Basic understanding of C programming
  • Basic HDL modeling experience

Configurations

  • Software Configuration :
    • Xilinx Vivado™ Design or System Edition 2017.3
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • Windows 7 64b
    • At least 8GB RAM
    • Minimum display resolution 1024 x 768, recommended 1920x1080

Outline

Overview of Embedded Hardware Development

Overview of Embedded Software Development

Hardware-Software Flow {Lab}

Zynq-7000 All Programmable SoC Architecture Overview {Lab}

MicroBlaze Processor Architecture Overview {Lab}

Zynq UltraScale+ MPSoC Overview {Lab}

PS Peripherals

  • High-Speed: USB
  • High-Speed: Gigabit Ethernet {Lab}
  • Low-Speed: Overview {Lab}
  • Low-Speed: CAN
  • Low-Speed: I2C
  • Low-Speed: SD/SDIO
  • Low-Speed: SPI
  • Low-Speed: UART

Processor Caching and SCLR

NEON Co-Processing {Lecture}

Zynq-7000 Device PS-PL Interface

Accelerator Coherency Port

Memory Types

  • Memory Overview
  • Block RAM Controllers
  • Static Memory Controllers
  • Dynamic Memory Controller (Zynq-7000 Device)

Interrupt Concepts

  • General Interrupt Controller
  • AXI Interrupt Controller for the MicroBlaze Processor

DMA

  • Introduction and Features {Lecture}
  • Block Design and Interrupts {Lecture}
  • Read and Write {Lecture, Lab}

AXI Concepts

  • AXI Streaming: Introduction
  • MicroBlaze Processor Streaming Ports
  • AXI Streaming FIFO
  • Connecting AXI IP
  • DMA

Utility Logic

Debugging

  • Hardware-Software Co-Debugging (Cross-Triggering) {Lab}

Booting

  • Overview {Lecture, Lab}
  • Boot Memory Technologies {Lecture}
  • Flow {Lecture}
  • PS Processors {Lecture, Lab}
  • PL {Lecture, Lab}
  • Secure Boot {Lecture}
  • FSBL {Lecture}

Teaching Methods

  • Face to face
  • Presentation by video projector
  • Provision of paper-based course materials

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL - DSP - Design RTL

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Concerned public

  • Technicians and Engineers in Digital Electronics