Designing with the Zynq UltraScale+ RFSoC
(ref.C_RFSOC)
3 days - 21 hours
Objectives
- After completing this comprehensive training, you will have the necessary skills to:
- Describing the RFSoC family in general
- Identifying applications for the RF Data Converter and SD-FEC blocks
- Configuring, simulating, and implementing the blocks
- Verifying the RF Data Converter on real hardware
Partners
Prerequisites
- Understanding of the Zynq-MPSoC architecture
- Basic familiarity with data converter terms and principles
- Basic familiarity with forward error correction terms and principles
Configurations
- Software Configuration :
- Vitis Unified Software Platform 2020.1
- Hardware configuration:
- Host computer for running the above software
- Zynq UltraScale+ RFSoC ZCU111 board (will be lent)
Outline
Zynq UltraScale+ RFSoC Overview {Lecture, Demo}
RF-ADC Hardware {Lecture, Demo, Lab}
RF-DAC Hardware {Lecture, Demo, Lab}
RFSoC Hardware {Lecture, Demo}
Data Converter Design {Lecture, Demo, Lab}
Practice on ZCU111 {Lecture, Demo, Lab}
Soft-Decision FEC Hardware {Lecture, Demo, Lab}
Teaching Methods
- Face to face
- Presentation by video projector
- Provision of paper-based course materials
Support
- Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
- Expert FPGA XILINX - Language VHDL - DSP - Design RTL
Methods of monitoring and assessment of results
- Attendance sheet
- Evaluation questionnaire
- Evaluation sheet on:
- Technical questionnaire
- Result of the Practical Works
- Validation of Objectives
- Presentation of a certificate with assessment of prior learning
Concerned public
- Technicians and Engineers in Digital Electronics