Migrating to the Vitis Embedded Software Development IDE Workshop


1 day - 7 hours


  • This workshop is intended for existing embedded developers using Xilinx SDK tools for software development.
  • After completing this comprehensive training, you will have the necessary skills to:
    • Develop and deploy an application on a Xilinx embedded system using the Vitis unified software platform
    • Migrate an existing SDK project to the Vitis platform


xilinx atp


  • C or C++ programming experience, including general debugging techniques
  • Conceptual understanding of embedded processing systems as it relates to the Xilinx ecosystem (specifically writing and modifying scripts, user applications, and boot loader operation)


  • Software Configuration :
    • Vitis unified software platform 2020.1
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • OS Linux 64-bits (Windows 10 compatible)
    • At least 16GB RAM
    • Display resolution recommended 1920x1080


Overview of the process for building a user application. {Lecture}

Introduces the basic behaviors required to drive the Vitis tool to generate a debuggable C/C++ application. {Lecture, Lab}

Overview of migrating existing Xilinx SDK projects to Vitis software development projects {Lecture, Demo}

Covers the various software components, or layers, supplied by Xilinx that aid in the creation of low-level software. Also the basic services (libraries) available. {Lecture, Lab}

Highlights important parts of the underlying Linux system as it pertains to applications. {Lecture}

Reviews the use of the Vitis tool for Linux software development. {Lecture, Lab}

Describes the basics of actually running a debugger and illustrates the most commonly used debugging commands. {Lecture, Lab}

Introduces the purpose and techniques for profiling a user application. {Lecture, Lab}

Teaching Methods

  • Inter-company training :
    • Online training
    • Presentation by Webex
    • Provision of course material in PDF format


  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL/Verilog - RTL Design
    • Expert SoC & MPSoC XILINX - Language C/C++ - System Design
    • Expert DSP & RFSoC XILINX – HLS - Matlab - Design DSP RF
    • Expert ACAP XILINX – AI Engines – Heteregenous System Architect

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Concerned public

  • Technicians and Engineers in Digital Electronics