Workshop : Designing with Spartan and Kintex Gen 2 UltraScale+ (French Language)
(ref.W_USGEN2)
1 day - 7 hours
Target objectives and skills
- After completing this workshop, you will have the necessary skills to:
- Identify the various memory and computing resources available on the chip
- Describe advanced I/O capabilities for various connectivity needs
- Identify high-speed transceivers for use in applications such as PCIe® Gen4
- Explain the configuration process
Concerned public
- Technicians and Engineers in Digital Electronics
- All our training courses are given at a distance and are accessible to people with reduced mobility.
- People with disabilities may have special training needs. Our partner AGEFIPH accompanies us to implement the necessary adaptations related to your disability. Don't hesitate to to discuss your requirements.
Prerequisites
- Any Xilinx device architecture class
- Familiarity with the Vivado® Design Suite
Course content
Introduction to the UltraScale+™ Families {Lecture}
Introduction to the Spartan™ and Kintex Gen 2 UltraScale+™ Architectures {Lecture}
Memory Resources {Lecture}
DSP Resources {Lecture}
I/O Resources {Lecture}
Transceivers and PCIe {Lecture}
Configuration and Security {Lecture}
Teaching Methods
- Inter-company online training :
- Fast Internet connection, webcam, headset
- Presentation by Webex by Cisco
Recommended computer hardware
- Inter-company online training :
- Recent computer OS Linux or Windows 64-bits
- Fast Internet, webcam, headset
- Software tool WebEx Cisco
Teaching staff
- William Duluc, Electronics and Telecoms Engineer, AMD Expert since 2009 and AMD Trainer since 2017 :
- Expert AMD FPGA - Language VHDL/Verilog - RTL Design
- Expert AMD SoC & MPSoC - Language C/C++ - System Design
- Expert DSP & AMD RFSoC – HLS - Matlab - Design DSP RF
- Expert AMD Versal – AI Engines – Heteregenous System Architect
Certified Partner
Notes
- Release date: 18/11/2025