Zynq™ All Programmable SoC : Embedded Systems Advanced Software Design

(ref.E_SWADV)

1 day - 7 hours

Objectives

  • After completing this comprehensive training, you will have the necessary skills to:
    • Implement an effective Zynq All Programmable SoC boot design methodology
    • Create an appropriate FSBL image for flash
    • Identify advanced Cortex™-A9 processor services for fully utilizing the capabilities of the Zynq All Programmable SoC
    • Analyze the operation and capabilities of the DMA controller in the Zynq All Programmable SoC
    • Examine the various Standalone library services and performance capabilities of the Ethernet and USB controllers in the Zynq All Programmable SoC
    • Describe the Standalone library services available for low-speed peripherals that are contained in the Zynq All Programmable SoC PS

Partners

xilinx atp

Prerequisites

  • C programming experience including general debugging techniques
  • Zynq™ All Programmable SoC : embedded systems software design training (E_SW) or equivalent knowledge
  • Zynq™ All Programmable SoC : system architecture training (E_ZSA) or equivalent knowledge
  • Basic understanding of Zynq, microprocesseur and FPGA architecture
  • Conceptual understanding of device drivers, interrupt routines, processor booting and bootloader

Configurations

  • Software Configuration :
    • Xilinx Vivado™ Design or System Edition 2017.3
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • Windows 7 64b
    • At least 8GB RAM
    • Minimum display resolution 1024 x 768, recommended 1920x1080

Outline

Booting

  • Overview {Lecture, Lab}
  • Boot Memory Technologies {Lecture}
  • Flow {Lecture}
  • PS Processors {Lecture, Lab}
  • PL {Lecture, Lab}
  • Secure Boot {Lecture}
  • FSBL {Lecture}

General Interrupt Controller {Lecture}

Processor Caching and SCLR {Lecture}

NEON Co-Processing {Lecture}

DMA

  • Introduction and Features {Lecture}
  • Block Design and Interrupts {Lecture}
  • Read and Write {Lecture, Lab}

High-Speed Peripherals

  • Gigabit Ethernet {Lecture, Lab}
  • USB {Lecture}

Low-Speed Peripherals

  • Overview {Lecture, Lab}
  • UART {Lecture}
  • CAN {Lecture}
  • I2C {Lecture}
  • SPI {Lecture}
  • SD/SDIO {Lecture}

Teaching Methods

  • Face to face
  • Presentation by video projector
  • Provision of paper-based course materials

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL - DSP - Design RTL

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Concerned public

  • Technicians and Engineers in Digital Electronics