Zynq UltraScale+™ MPSoC : System Architecture

(ref.E_ZUPSA)

2 days - 14 hours

Objectives

  • This course provides system architects with an overview of the capabilities and support for the Zynq UltraScale+ MPSoC family.
  • After completing this comprehensive training, you will have the necessary skills to:
    • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
    • Identify mechanisms to secure and safely run the system
    • Outline the high-level architecture of the devices
    • Define the boot sequences appropriate to the needs of the system

Partners

xilinx atp

Prerequisites

  • Understanding of the Zynq-7000 architecture
  • Familiarity with embedded operating systems

Configurations

  • Software Configuration :
    • Vitis unified software platform 2020.1
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • OS Linux 64-bits
    • At least 16GB RAM
    • Display resolution recommended 1920x1080

Outline

Zynq UltraScale+ MPSoC Overview {Lecture, Lab}

Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture, Lab}

QEMU {Lecture, Lab}

Zynq UltraScale+ MPSoC Security and Software {Lecture}

Zynq UltraScale+ MPSoC Power Management {Lecture, Lab}

Zynq UltraScale+ MPSoC System Coherency {Lecture}

Zynq UltraScale+ MPSoC DDR and QoS {Lecture, Demo, Lab}

Zynq UltraScale+ MPSoC Booting {Lecture, Lab}

Zynq UltraScale+ MPSoC Ecosystem Support {Lecture}

Teaching Methods

  • Classroom training:
    • Face to face
    • Presentation by video projector
    • Provision of PDF course materials
  • Virtual training:
    • Onlive training
    • Presentation by Webex
    • Provision of PDF course materials

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL/Verilog - RTL Design
    • Expert SoC & MPSoC XILINX - Language C/C++ - System Design
    • Expert DSP & RFSoC XILINX – HLS - Matlab - Design DSP RF
    • Expert ACAP XILINX – AI Engines – Heteregenous System Architect

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Concerned public

  • Technicians and Engineers in Digital Electronics