Designing an Integrated PCI Express System

(ref.C_PCIE)

2 days - 14 hours

Objectives

  • After completing this training, you will have the necessary skills to:
    • 1 - Define the considerations of a PCI-e system
    • 2 - Select the appropriate core for your application
    • 3 - Use the wizard to create a PCI-e design
    • 4 - Access reference material and debugging tools and identify advanced features

Prerequisites

  • Experience with PCIe specification protocol
  • Knowledge of VHDL or Verilog
  • Some experience with Xilinx implementation tools
  • Some experience with a simulation tool, preferably the Vivado® simulator

Concerned public

  • Technicians and Engineers in Digital Electronics
  • All our training courses are given at a distance and are accessible to people with reduced mobility.
  • Our partner AGEFIPH accompanies us to implement the necessary adaptations related to your disability.
              • agefiph

Notes

  • Release date: 13/12/2021

Chapters

Objective 1

  • Packet Formatting Details {Lecture}
  • Endpoint Application Considerations {Lecture}
  • Root Port Applications {Lecture}

Objective 2

  • Xilinx PCI Express Solutions {Lecture}
  • Connecting Logic to the Core {Lecture}
  • PCIe Core Customization {Lecture, Lab}

Objective 3

  • Simulating a PCIe System Design {Lecture, Lab}

Objective 3

  • Design Implementation and PCIe Configuration {Lecture, Lab}
  • PCI Express in Embedded Systems {Lecture, Lab}

Objective 4

  • Application Focus: DMA {Lecture, Lab}
  • Debugging and Compliance {Lecture}
  • Interrupts and Error Management {Lecture}

Teaching Methods

  • Inter-company online training :
    • Presentation by Webex by Cisco
              • Webex de Cisco
    • Provision of course material in PDF format
    • Labs on Cloud PC by RealVNC
              • REALVNC

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL/Verilog - RTL Design
    • Expert SoC & MPSoC XILINX - Language C/C++ - System Design
    • Expert DSP & RFSoC XILINX – HLS - Matlab - Design DSP RF
    • Expert ACAP XILINX – AI Engines – Heteregenous System Architect

PC Recommended

Partner

xilinx atp