Microcontrôleurs i.MX28

(ref.004871A)

4 jours

Objectifs

  • The course details the hardware implementation of the i.MX28 microcontroller
  • The boot sequence and the clocking are explained
  • The course explains all parameters that affect the performance of the system in order to easily perform the final tuning
  • A description of all internal peripherals is provided
  • An overview of the ARM926EJ-S core helps to understand issues caused by cache and MMU
  • The course ends with practical labs explaining how to generate a Linux image as well as a Root File System, by using a tool called LTIB [Linux Target Image Builder]

Partenaires

FreescaleARM ATC

Prérequis

  • A basic understanding of microprocessors and microcontrollers is recommended
  • A basic understanding of digital logic or hardware / ASIC design issues would be useful but not essential
  • A basic understanding of assembler or C programming would be useful but not essential

Contenu

ARM core based architecture

Clarifying the internal data paths

AHB Multi-Layer interconnect

Organization of a board based on i.MX28

Memory map

Presentation of the core

Operating modes

Pipeline

ARM vs Thumb instruction sets, interworking

Branch instructions

C-to-Assembly interface

Exception mechanism

Debug facilities

On-Chip RAM and ROM

Interrupt collector

Default First Level Page Table

HCLK performance counter

Free-running microseconds counter

Entropy control

Write once register

SRAM control

Clock distribution

Power-up sequence

Low power modes, clock gating

System boot mode selection

Bootstrap mode operation

DC-DC converter

Battery monitor and charger

GPIO module

General Purpose Input interrupt request capability

Signal description

DATA CO-PROCESSOR

Memory copy, Blit and fill functionality

Encryption

Hashing

Channels

EXTERNAL MEMORY INTERFACE

EMI address mapping

AHB and AXI interface

Multi-port arbitrer

DDR controller

Programming the chip-selects

Nand flash controller

Parity processing

20-BIT Correcting ECC Accelerator

MMC/SD/SDIO 1, 4, 8 bits support

SPI master and slave modes

SPI clock phase and polarity

SD/MMC Command generation

SD/MMC block transfers

DMA usage

Real-time AXI performance statistics collection

Transactions monitoring

Interrupts

Second and millisecond counters

Alarm (auto power-up) and watchdog (auto-reset)

Crystal power domain

Shadow registers and copy controller

Fixed count and match count timer modes

External input signals

Duty cycle mode

Rotary decoder

Message buffer management

Message buffer structures

Message filtering

Message buffer storage

Loop-back and listen only modes

Priorities

Timestamp

Double MAC

Integrated unified DMA

3-port integrated switch

Frame buffers

Address filtering

Debug UART

Application UARTs

DMA transfers

High-speed ADC

Low-resolution ADC

Touch screen interface

USB 2.0 Host

USB 2.0 Device/Host

DMA Interface

Integrated PHY

Display formats and resolutions

RGB formats

ITU-R BT.656 format

Pixel handling

Cropping/Masking

Scaling

Color space conversion

Rotation

Alpha Blending

Transmission / Reception

FIFOs

DMA operation

Data transmission

FIFOs

DMA operation

I2C

Master mode

Slave mode

Interrupts

DMA operation

PWM

How to generate a Linux Kernel image and the Root File System

Notes

  • Les supports de cours seront fournis sur papier à chaque participant pendant la formation