Zynq™ All Programmable SoC : System Architecture

(ref.E_ZSA)

2 days - 14 hours

Objectives

  • After completing this comprehensive training, you will have the necessary skills to:
    • Describe the architecture and components that comprise the Zynq All Programmable SoC processing system (PS)
    • Relate a user design goal to the function, benefit, and use of the Zynq All Programmable SoC
    • Effectively select and design an interface between the Zynq PS and programmable logic (PL) that meets project goals
    • Analyze the tradeoffs and advantages of performing a function in software versus PL

Partners

xilinx atp

Prerequisites

  • Digital system architecture design experience
  • Basic understanding of microprocessor and FPGA architecture
  • Basic understanding of C programming
  • Basic HDL modeling experience

Configurations

  • Software Configuration :
    • Xilinx Vivado™ Design or System Edition 2017.3
  • Hardware configuration:
    • Recent computer (i5 or i7)
    • Windows 7 64b
    • At least 8GB RAM
    • Minimum display resolution 1024 x 768, recommended 1920x1080

Outline

Overview

Application Processor Unit (APU) {Lab}

Neon Co-Processor

Input/Output Peripherals

PS Peripherals

  • Low-Speed: Overview
  • Low-Speed: UART
  • Low-Speed: CAN
  • Low-Speed: I2C
  • Low-Speed: SD/SDIO
  • Low-Speed: GPIO
  • High-Speed: USB
  • High-Speed: Gigabit Ethernet {Lab}

DMA Controller (DMAC) {Lab}

DMA

  • Introduction and Features
  • Block Design and Interrupts
  • Read and Write

AXI

  • Introduction
  • Variations
  • Transactions {Lab}

PS-PL Interface {Lab}

Booting {Lab}

Memory Resources

Meeting Performance Goals {Lab}

Hardware Design

Software Design {Lab}

Debugging {Lab}

Tools and Reference Designs

Teaching Methods

  • Face to face
  • Presentation by video projector
  • Provision of paper-based course materials

Support

  • Authorized Trainer Provider XILINX : Engineer Electronics and Telecommunications ENSIL
    • Expert FPGA XILINX - Language VHDL - DSP - Design RTL

Methods of monitoring and assessment of results

  • Attendance sheet
  • Evaluation questionnaire
  • Evaluation sheet on:
    • Technical questionnaire
    • Result of the Practical Works
    • Validation of Objectives
  • Presentation of a certificate with assessment of prior learning

Concerned public

  • Technicians and Engineers in Digital Electronics